On the opening of the Power ISA, and the chilling effects of proprietary ISAs
So IBM, and the OpenPOWER foundation have announced that they will be opening up the Power instruction set, such that anyone can implement it, royalty-free.
New era of open ISAs. I've long thought that the way companies have tried to keep instruction sets proprietary, despite the fact that file formats cannot be copyrighted, using patent law, to be silly and destructive. An enlightened effort to stand above this and create a commons instruction set anyone can use was long overdue, and came in the form of RISC-V. Though there were previous efforts to create something like this, such as OpenRISC, RISC-V was the first time an effort like this truly gained major traction and industry buy-in.
Since RISC-V's future ascendancy has now become obvious for all to see, companies which have made their income on licencing their ISA are beginning to realise the writing is on the wall. MIPS made a grand announcement that it would be opening its ISA, clearly in response to the RISC-V trend, though its subsequent delivery on this has seemed lacking. Nonetheless, the era in which instruction sets could be licenced for royalties as a business model is coming to an end.
For this reason, I've been hoping for some time that IBM would open up the Power ISA to royalty-free implementation. We're in the middle of a renaissance in freely licenced (RISC-V) CPU softcores, something brought about largely by community goodwill and interest as a result of the open, royalty-free licence; it would be tragic if the Power ISA, which has mature ecosystems for both the embedded and server domains, missed out on this.
How optics affect the commons. It's important to note that people's choice whether to make softcore RTL implementations of a given ISA or not aren't necessarily rational, and also requires an effort to generate interest. For example, the PPC405, one of the earliest embedded Power ISA cores, was released in 1998, which means any patents pertaining to it must have expired by 2018. In other words, the subset of the modern Power ISA implemented by the PPC405 was already open to royalty free implementation (perhaps minus only use of the Power trademark).
But of course, it's nobody's job in particular to point this out, to remind people that a freely licenced RTL implementation could be legally written without problem. People don't notice, and there's no entity trying to drum up enthusiasm (and make it clear that no vexatious sueballs will be forthcoming).
To put it simply, the perception that ISAs are proprietary has a subtantial chilling effect on the open hardware community of people interested in writing freely licenced RTL implementations of an ISA, which in any given case may or may not be rational. Even a major subset of x86 must be out of patent by now, but people retain the perception that it is proprietary and Intel/AMD's “turf”; that implementing it would be in some way legally problematic.
There are occasional exceptions. The J-Core project is an open RTL implementation of the SuperH architecture, based on a studious examination of the patents pertaining to each generation of the architecture. RTL implementing newer variations of the architecture are published only as the applicable patents expire. But these efforts are rare, and until OpenPOWER announced the opening of the Power ISA, I was not able to find a single RTL implementation of the Power ISA on GitHub, not even an out-of-patent subset of it.
In other words, seeing people get involved in making RTL implementations is as much about perception as it is the actual legal reality — and about whether people feel that investing their time in an ISA is worthwhile, because it is being operated in a spirit of reciprocal openness, rather than being jealously guarded by a vendor, who might lob sueballs at people who dare to implement it, which might cause significant legal costs to people even if their claims are ultimately overturned. As regards open ISA implementations, the perception of freedom is even more important than freedom itself.
On the back of the freedom advertised by RISC-V, I now can't walk two feet on GitHub for stumbling over another RISC-V softcore. There are dozens of RTL RISC-V softcores available now. The writing has been on the wall for proprietary ISAs (at least ones that aren't x86 or ARM) for some time. My hope is that by opening the Power ISA to implementation by any party without royalty, we will equally see an ecosystem of freely licenced, open source Power softcores finally develop.
Comparative merit of ISAs. Some people have raised questions of what the point is of opening the Power ISA when RISC-V has seized most of the thunder so far. One possible advantage is that the Power ecosystem is more mature; it dates to the early 90s and accordingly, it has mature tooling, compilers, etc. By comparison, RISC-V tooling is still being cooked in some regards; LLVM/clang has yet to ship the RISC-V backend by default, for example. Moreover, another open ISA is never a bad thing.
What I hope IBM does. The question now, however, is how to deliver on the open ISA promise such that people can make constructive use of it. In my opinion, some sort of reference codebase is practically necessary in order to provide a starting point for making compatible implementations, and assessing that those implementations are conformant. Personally, I hope that IBM does at least one of these things:
Opens up one RTL softcore, such as the PPC405. This is a real implementation of the Power ISA which has been taped out, so it would be an effective means for people writing new implementations to assess compatibility, see what a real-world Power core looks like, and resolve any ambiguities in the Power ISA specification.
The PPC405 is one of the oldest Power ISA cores, and my guess is that opening it would not be a big loss of revenue for IBM, who in any case, in recent years, appear to have lost interest in revenues from licencing embedded cores — once upon a time, marketing pages for licencing various embedded cores such as the PPC405 were on IBM's website (and can still be found via archive.org), but are now long gone. Moreover, there would be no need to publish any hard IP realisation of the RTL, which could continue to be commercially licenced. This would directly parallel SiFive's business model of selling hard IP realisations of freely licenced RISC-V RTL softcores.
Moreover, in the past IBM has indicated it is willing to licence the PPC405 to the research community. In other words, IBM has toyed with providing access to this very core in the past, probably for the very reasons I give above. This suggests they wouldn't necessarily be unwilling to open it.
Opens up Mambo, the POWER Functional Simulator. As I understand it, most proprietary ISA vendors tend to have an internal “golden reference” C++ codebase which they use as a reference description of their ISA, generally considered even more canonical than the written specifications for the ISA which they publish. Yet these golden codebases are never published. IBM does publish binaries for Mambo, which AFAIK is IBM's golden reference codebase for the Power ISA, but does not currently publish source.
Opening the Mambo codebase would provide a useful reference implementation to those writing new RTL softcores, and again, would provide a way to assess compatibility and ISA conformance.
The main showstopper here might be that Mambo is likely to contain implementations for certain ISA extensions that IBM has never published, such as the tagged memory extensions used by the IBM i operating system. IBM is rather secretive about these extensions and has never published documentation for them. What I would say though, is that these extensions are actually quite minor — and aren't nearly as secret as IBM thinks. Moreover, much of it is already exposed in patent filings, right down to the instruction encodings; I don't think IBM has anything to lose from publishing this information.
I feel like at least one of these things needs to happen to enable the community to take advantage of the new status of the Power ISA, but I don't have strong feelings on which one. I think either would work. Realistically, having a readily available reference implementation is vital to implementing an ISA which has a legacy of compatibility dating back 30 years.
Moreover, OpenPOWER has made some noises about seeking to ensure that new implementations are properly compatible with the ISA, so it stands to reason they will need some way of testing compliance with the ISA specification. Barring the above, perhaps they have their own plans for a conformance test suite or something similar — that could also be a viable option.
Finally, another thing which could be done to help third parties implement the Power ISA is to start providing the Power ISA specification in machine-readable form; currently, it is published only as a PDF, but machine-readable versions of it are believed to exist internally. These would be of substantial assistance to people who would like to automatically synthesize implementations from the psuedocode found in the ISA specification. (The urgency of this need is perhaps demonstrated by the fact that I know one person working on an RTL implementation who has resorted to parsing the PDF to try and automatically extract the psuedocode.)